정보통신전자공학부

  • 트리니티
  • 사이버캠퍼스

  • This provides an unofficial translation by the Google translate. For more information, mail to prcuk@catholic.ac.kr

 
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대학원과정

홈

연구 분야

연구실명

차세대 나노소자 연구실 / Advanced Nanoelectronic Device Laboratory: ANDL

지도교수

권지석 교수님, jskwon@catholic.ac.kr, 02-2164-4371(다솔관 317)

연락처

다솔관 534호

연구내용

차세대 나노소자 연구실에서는 차세대 반도체 소자 분석 및 최적화와 집적회로 설계 위한 모델링 연구를 수행하고 있습니다. 연구실 목표는 산업체에서 요구하는 차세대 반도체 기술 개발을 주도적으로 수행 가능한 고급 엔지니어 양성에 있으며, 산업계 기술 수요 기반 실무적 주제에 관한 연구를 수행합니다. 주요 연구분야는 다음과 같습니다.

  • Development of HZO-based high-performance and low-power semiconductor devices
    • Development of ferroelectric-based logic-in-memory device/circuit compatible with CMOS process
    • Research for improving the reliability of ferroelectric thin films
    • FTJ (Ferroelectric Tunneling Junction): development of high-density, low-power memory devices
  • High-quality oxide material
    • Gate insulating film deposition technology using ALD
    • Ferroelectric device based on HZO ferroelectric using ALD
  • Beyond graphene, 2-D materials (MoS2, MoSe2, Black Phosphorus, etc.)
    • Low-frequency noise analysis/modeling
    • Study of properties of 2-D materials, including electron transport, contacts, interfaces and their applications

주요 연구성과

  • RECESS CHANNEL TRANSISTOR에서 특성 개선을 위한 FULLY SIGE CHANNEL 구조, 정해인, 장성호, 권지석, 김승환, 홍승호, SAMSUNG ELECTRONICS CO., LTD, 2023 (Under Review US Patent)
  • ULSI 소자 Speed 특성 확보 위한 Stopper Nitride 최소화, 김승환, 장성호, 권지석, 정해인, 홍승호, SAMSUNG ELECTRONICS CO., LTD, 2023 (Under Review US Patent)
  • S. R. Das, D. B. Janes, J. Kwon, “LOW NOISE AND HIGH-PERFORMANCE FIELD EFFECT TRANSISTORS OF 2-DIMENSIONAL MATERIALS AND METHODS TO FABRICATE THE SAME” Provisional Patent Application Serial No. 62/688,780 Filed by Kansas State and Purdue University Research Foundation on Sep. 9, 2021. (US. Patent)
  • J. Kwon, C. J. Delker, D. B. Janes, and C. T. Harris, S. R. Das, “Molybdenum Contact to MoS2 Field Effect Transistors: Schottky Barrier Extraction, Electrical Transport and Low-Frequency Noise,” Physica Status Solidi (a), 217, 17, 2020. (Cover Article)
  • J. Kwon, C. J. Delker, C. T. Harris, S. R. Das, and D. B. Janes, “Experimental and modeling study of 1/f noise in multilayer MoS2 and MoSe2 field-effect transistors,” Journal of Applied Physics, 128, 9, 2020. (Featured and Cover Article)
  • J. Kwon, J. H. Park, C. J. Delker, C. T. Harris, B. Swartzentruber, S. R. Das, and D. B. Janes, “Transitions Between Channel and Contact Regimes of Low-Frequency Noise in Many-Layer MoS2 Field Effect Transistors,” Appl. Phys. Lett., 114, 113502, 2019.
  • J. Kwon, C. J. Delker, C. T. Harris, B. Swartzentruber, S. R. Das, and D. B. Janes, “Mobility and 1/f Noise on MoS2 and MoSe2 Field-Effect Transistors - Understanding the Intrinsic Device,” Workshop on Innovative Nanoscale Devices and Systems (WINDS), Hawaii, USA, 2018. (invited)
  • J. Kwon, C. J. Delker, C. T. Harris, B. Swartzentruber, S. R. Das, and D. B. Janes, “Comparison of Electrical and 1/f Noise properties of MoS2 and MoSe2 FETs, United States. https://www.osti.gov/servlets/purl/1510669, 2018.
  • J. Kwon, A. Prakash, S. R. Das, and D. B. Janes, “Correlating Electronic Transport and 1/ f Noise in MoSe2 Field-Effect Transistors,” Phys. Rev. Appl., vol. 10, no. 6, p. 064029, 2018. (In the Media)
  • S. R. Das*, J. Kwon*, A. Prakash, C. J. Delker, S. Das, and D. B. Janes, “Low-frequency noise in MoSe2 field effect transistors,” Appl. Phys. Lett., vol. 106, no. 08, p. 083507, 2015. (* equal contribution)